lowRISC / opentitan
OpenTitan: Open source silicon root of trust
See what the GitHub community is most excited about this week.
OpenTitan: Open source silicon root of trust
Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
RISC-V Debug Support for our PULP RISC-V Cores
A minimal Linux-capable 64-bit RISC-V SoC built around CVA6
Common SystemVerilog components
AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication