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android / kernel / common / d6c552505c0d1719dda42b4af2def0618bd7bf54 / . / drivers / iommu / Kconfig
blob: c60395b7470f640cc229c53bbd825235d61194c1 [file] [log] [blame]
Ohad Ben-Cohenab493a02011-06-02 02:48:05 +0300[diff] [blame]1# IOMMU_API always gets selected by whoever wants it.
2config IOMMU_API
3 bool
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +0300[diff] [blame]4
Joerg Roedel68255b62011-06-14 15:51:54 +0200[diff] [blame]5menuconfig IOMMU_SUPPORT
6 bool "IOMMU Hardware Support"
Arnd Bergmanne5144c92015-01-28 15:45:53 +0100[diff] [blame]7 depends on MMU
Joerg Roedel68255b62011-06-14 15:51:54 +0200[diff] [blame]8 default y
9 ---help---
10 Say Y here if you want to compile device drivers for IO Memory
11 Management Units into the kernel. These devices usually allow to
12 remap DMA requests and/or remap interrupts from other devices on the
13 system.
14
15if IOMMU_SUPPORT
16
Will Deaconfdb1d7b2014-11-14 17:16:49 +0000[diff] [blame]17menu "Generic IOMMU Pagetable Support"
18
19# Selected by the actual pagetable implementations
20config IOMMU_IO_PGTABLE
21 bool
22
Will Deacone1d3c0f2014-11-14 17:18:23 +0000[diff] [blame]23config IOMMU_IO_PGTABLE_LPAE
24 bool "ARMv7/v8 Long Descriptor Format"
25 select IOMMU_IO_PGTABLE
Geert Uytterhoeven48e6f76522018-04-17 19:49:09 +0200[diff] [blame]26 depends on ARM || ARM64 || (COMPILE_TEST && !GENERIC_ATOMIC64)
Will Deacone1d3c0f2014-11-14 17:18:23 +0000[diff] [blame]27 help
28 Enable support for the ARM long descriptor pagetable format.
29 This allocator supports 4K/2M/1G, 16K/32M and 64K/512M page
30 sizes at both stage-1 and stage-2, as well as address spaces
31 up to 48-bits in size.
32
Will Deaconfe4b9912014-11-17 23:31:12 +0000[diff] [blame]33config IOMMU_IO_PGTABLE_LPAE_SELFTEST
34 bool "LPAE selftests"
35 depends on IOMMU_IO_PGTABLE_LPAE
36 help
37 Enable self-tests for LPAE page table allocator. This performs
38 a series of page-table consistency checks during boot.
39
40 If unsure, say N here.
41
Robin Murphye5fc9752016-01-26 17:13:13 +0000[diff] [blame]42config IOMMU_IO_PGTABLE_ARMV7S
43 bool "ARMv7/v8 Short Descriptor Format"
44 select IOMMU_IO_PGTABLE
Geert Uytterhoeven48e6f76522018-04-17 19:49:09 +0200[diff] [blame]45 depends on ARM || ARM64 || COMPILE_TEST
Robin Murphye5fc9752016-01-26 17:13:13 +0000[diff] [blame]46 help
47 Enable support for the ARM Short-descriptor pagetable format.
48 This supports 32-bit virtual and physical addresses mapped using
49 2-level tables with 4KB pages/1MB sections, and contiguous entries
50 for 64KB pages/16MB supersections if indicated by the IOMMU driver.
51
52config IOMMU_IO_PGTABLE_ARMV7S_SELFTEST
53 bool "ARMv7s selftests"
54 depends on IOMMU_IO_PGTABLE_ARMV7S
55 help
56 Enable self-tests for ARMv7s page table allocator. This performs
57 a series of page-table consistency checks during boot.
58
59 If unsure, say N here.
60
Will Deaconfdb1d7b2014-11-14 17:16:49 +0000[diff] [blame]61endmenu
62
Gary R Hookbad614b2018-06-12 16:41:21 -0500[diff] [blame]63config IOMMU_DEBUGFS
64 bool "Export IOMMU internals in DebugFS"
65 depends on DEBUG_FS
66 help
67 Allows exposure of IOMMU device internals. This option enables
68 the use of debugfs by IOMMU drivers as required. Devices can,
69 at initialization time, cause the IOMMU code to create a top-level
70 debug/iommu directory, and then populate a subdirectory with
71 entries as required.
72
Olof Johansson58d11312018-07-20 11:02:23 -0700[diff] [blame]73config IOMMU_DEFAULT_PASSTHROUGH
74 bool "IOMMU passthrough by default"
75 depends on IOMMU_API
76 help
77 Enable passthrough by default, removing the need to pass in
78 iommu.passthrough=on or iommu=pt through command line. If this
79 is enabled, you can still disable with iommu.passthrough=off
80 or iommu=nopt depending on the architecture.
81
82 If unsure, say N here.
83
Robin Murphy114150d2015-01-12 17:51:13 +0000[diff] [blame]84config IOMMU_IOVA
Sakari Ailus15bbdec2015-07-13 14:31:30 +0300[diff] [blame]85 tristate
Robin Murphy114150d2015-01-12 17:51:13 +0000[diff] [blame]86
Hiroshi Doyu4e0ee782012-06-25 14:23:54 +0300[diff] [blame]87config OF_IOMMU
88 def_bool y
Will Deacon7eba1d52014-08-27 16:20:32 +0100[diff] [blame]89 depends on OF && IOMMU_API
Hiroshi Doyu4e0ee782012-06-25 14:23:54 +0300[diff] [blame]90
Robin Murphy0db2e5d2015-10-01 20:13:58 +0100[diff] [blame]91# IOMMU-agnostic DMA-mapping layer
92config IOMMU_DMA
93 bool
Robin Murphy0db2e5d2015-10-01 20:13:58 +0100[diff] [blame]94 select IOMMU_API
95 select IOMMU_IOVA
Robin Murphy59a68eb82016-02-29 11:13:39 +0000[diff] [blame]96 select NEED_SG_DMA_LENGTH
Robin Murphy0db2e5d2015-10-01 20:13:58 +0100[diff] [blame]97
Varun Sethi695093e32013-07-15 10:20:57 +0530[diff] [blame]98config FSL_PAMU
99 bool "Freescale IOMMU support"
Joerg Roedela4d98fb2017-08-09 15:00:36 +0200[diff] [blame]100 depends on PCI
Joerg Roedelaf29d9f2017-08-09 15:04:47 +0200[diff] [blame]101 depends on PHYS_64BIT
Andy Fleminga0d284d2016-03-16 23:15:44 -0500[diff] [blame]102 depends on PPC_E500MC || (COMPILE_TEST && PPC)
Varun Sethi695093e32013-07-15 10:20:57 +0530[diff] [blame]103 select IOMMU_API
104 select GENERIC_ALLOCATOR
105 help
106 Freescale PAMU support. PAMU is the IOMMU present on Freescale QorIQ platforms.
107 PAMU can authorize memory access, remap the memory address, and remap I/O
108 transaction types.
109
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +0300[diff] [blame]110# MSM IOMMU support
111config MSM_IOMMU
112 bool "MSM IOMMU Support"
Joerg Roedel477ab7a2015-01-20 16:13:33 +0100[diff] [blame]113 depends on ARM
114 depends on ARCH_MSM8X60 || ARCH_MSM8960 || COMPILE_TEST
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +0300[diff] [blame]115 select IOMMU_API
Sricharan Rc9220fb2016-06-13 17:06:06 +0530[diff] [blame]116 select IOMMU_IO_PGTABLE_ARMV7S
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +0300[diff] [blame]117 help
118 Support for the IOMMUs found on certain Qualcomm SOCs.
119 These IOMMUs allow virtualization of the address space used by most
120 cores within the multimedia subsystem.
121
122 If unsure, say N here.
123
124config IOMMU_PGTABLES_L2
125 def_bool y
126 depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +0300[diff] [blame]127
128# AMD IOMMU support
129config AMD_IOMMU
130 bool "AMD IOMMU support"
131 select SWIOTLB
132 select PCI_MSI
Joerg Roedel52815b72011-11-17 17:24:28 +0100[diff] [blame]133 select PCI_ATS
134 select PCI_PRI
135 select PCI_PASID
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +0300[diff] [blame]136 select IOMMU_API
Joerg Roedela72c4222016-07-05 11:12:49 +0200[diff] [blame]137 select IOMMU_IOVA
Thomas Petazzoni0dbc6072013-10-03 11:59:14 +0200[diff] [blame]138 depends on X86_64 && PCI && ACPI
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +0300[diff] [blame]139 ---help---
140 With this option you can enable support for AMD IOMMU hardware in
141 your system. An IOMMU is a hardware component which provides
142 remapping of DMA memory accesses from devices. With an AMD IOMMU you
Masanari Iida59bf8962012-04-18 00:01:21 +0900[diff] [blame]143 can isolate the DMA memory of different devices and protect the
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +0300[diff] [blame]144 system from misbehaving device drivers or hardware.
145
146 You can find out if your system has an AMD IOMMU if you look into
147 your BIOS for an option to enable it or if you have an IVRS ACPI
148 table.
149
Joerg Roedele3c495c2011-11-09 12:31:15 +0100[diff] [blame]150config AMD_IOMMU_V2
Kees Cooka446e212013-01-16 18:53:39 -0800[diff] [blame]151 tristate "AMD IOMMU Version 2 driver"
Borislav Petkove5cac322014-07-10 12:44:56 +0200[diff] [blame]152 depends on AMD_IOMMU
Joerg Roedel8736b2c2011-11-24 16:21:52 +0100[diff] [blame]153 select MMU_NOTIFIER
Joerg Roedele3c495c2011-11-09 12:31:15 +0100[diff] [blame]154 ---help---
155 This option enables support for the AMD IOMMUv2 features of the IOMMU
156 hardware. Select this option if you want to use devices that support
Masanari Iida59bf8962012-04-18 00:01:21 +0900[diff] [blame]157 the PCI PRI and PASID interface.
Joerg Roedele3c495c2011-11-09 12:31:15 +0100[diff] [blame]158
Gary R Hook7d0f5fd2018-06-12 16:41:30 -0500[diff] [blame]159config AMD_IOMMU_DEBUGFS
160 bool "Enable AMD IOMMU internals in DebugFS"
161 depends on AMD_IOMMU && IOMMU_DEBUGFS
162 ---help---
163 !!!WARNING!!! !!!WARNING!!! !!!WARNING!!! !!!WARNING!!!
164
165 DO NOT ENABLE THIS OPTION UNLESS YOU REALLY, -REALLY- KNOW WHAT YOU ARE DOING!!!
166 Exposes AMD IOMMU device internals in DebugFS.
167
168 This option is -NOT- intended for production environments, and should
169 not generally be enabled.
170
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300[diff] [blame]171# Intel IOMMU support
Suresh Siddhad3f13812011-08-23 17:05:25 -0700[diff] [blame]172config DMAR_TABLE
173 bool
174
175config INTEL_IOMMU
176 bool "Support for Intel IOMMU using DMA Remapping Devices"
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300[diff] [blame]177 depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC)
178 select IOMMU_API
Robin Murphy114150d2015-01-12 17:51:13 +0000[diff] [blame]179 select IOMMU_IOVA
Christoph Hellwigf616ab52018-05-09 06:53:49 +0200[diff] [blame]180 select NEED_DMA_MAP_STATE
Suresh Siddhad3f13812011-08-23 17:05:25 -0700[diff] [blame]181 select DMAR_TABLE
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300[diff] [blame]182 help
183 DMA remapping (DMAR) devices support enables independent address
184 translations for Direct Memory Access (DMA) from devices.
185 These DMA remapping devices are reported via ACPI tables
186 and include PCI device scope covered by these DMA
187 remapping devices.
188
David Woodhouse8a94ade2015-03-24 14:54:56 +0000[diff] [blame]189config INTEL_IOMMU_SVM
190 bool "Support for Shared Virtual Memory with Intel IOMMU"
191 depends on INTEL_IOMMU && X86
David Woodhouseb16d0cb2015-10-12 14:17:37 +0100[diff] [blame]192 select PCI_PASID
David Woodhouse2f26e0a2015-09-09 11:40:47 +0100[diff] [blame]193 select MMU_NOTIFIER
David Woodhouse8a94ade2015-03-24 14:54:56 +0000[diff] [blame]194 help
195 Shared Virtual Memory (SVM) provides a facility for devices
196 to access DMA resources through process address space by
197 means of a Process Address Space ID (PASID).
198
Suresh Siddhad3f13812011-08-23 17:05:25 -0700[diff] [blame]199config INTEL_IOMMU_DEFAULT_ON
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300[diff] [blame]200 def_bool y
Suresh Siddhad3f13812011-08-23 17:05:25 -0700[diff] [blame]201 prompt "Enable Intel DMA Remapping Devices by default"
202 depends on INTEL_IOMMU
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300[diff] [blame]203 help
204 Selecting this option will enable a DMAR device at boot time if
205 one is found. If this option is not selected, DMAR support can
206 be enabled by passing intel_iommu=on to the kernel.
207
Suresh Siddhad3f13812011-08-23 17:05:25 -0700[diff] [blame]208config INTEL_IOMMU_BROKEN_GFX_WA
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300[diff] [blame]209 bool "Workaround broken graphics drivers (going away soon)"
Suresh Siddhad3f13812011-08-23 17:05:25 -0700[diff] [blame]210 depends on INTEL_IOMMU && BROKEN && X86
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300[diff] [blame]211 ---help---
212 Current Graphics drivers tend to use physical address
213 for DMA and avoid using DMA APIs. Setting this config
214 option permits the IOMMU driver to set a unity map for
215 all the OS-visible memory. Hence the driver can continue
216 to use physical addresses for DMA, at least until this
217 option is removed in the 2.6.32 kernel.
218
Suresh Siddhad3f13812011-08-23 17:05:25 -0700[diff] [blame]219config INTEL_IOMMU_FLOPPY_WA
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300[diff] [blame]220 def_bool y
Suresh Siddhad3f13812011-08-23 17:05:25 -0700[diff] [blame]221 depends on INTEL_IOMMU && X86
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300[diff] [blame]222 ---help---
223 Floppy disk drivers are known to bypass DMA API calls
224 thereby failing to work when IOMMU is enabled. This
225 workaround will setup a 1:1 mapping for the first
226 16MiB to make floppy (an ISA device) work.
227
Suresh Siddhad3f13812011-08-23 17:05:25 -0700[diff] [blame]228config IRQ_REMAP
Kees Cooka446e212013-01-16 18:53:39 -0800[diff] [blame]229 bool "Support for Interrupt Remapping"
230 depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI
Suresh Siddhad3f13812011-08-23 17:05:25 -0700[diff] [blame]231 select DMAR_TABLE
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300[diff] [blame]232 ---help---
233 Supports Interrupt remapping for IO-APIC and MSI devices.
234 To use x2apic mode in the CPU's which support x2APIC enhancements or
235 to support platforms with CPU's having > 8 bit APIC ID, say Y.
Joerg Roedel68255b62011-06-14 15:51:54 +0200[diff] [blame]236
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300[diff] [blame]237# OMAP IOMMU support
238config OMAP_IOMMU
239 bool "OMAP IOMMU Support"
Joerg Roedel477ab7a2015-01-20 16:13:33 +0100[diff] [blame]240 depends on ARM && MMU
241 depends on ARCH_OMAP2PLUS || COMPILE_TEST
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300[diff] [blame]242 select IOMMU_API
Gerd Hoffmann06b718c2014-11-11 09:17:00 +0100[diff] [blame]243 ---help---
244 The OMAP3 media platform drivers depend on iommu support,
245 if you need them say Y here.
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300[diff] [blame]246
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300[diff] [blame]247config OMAP_IOMMU_DEBUG
Suman Anna61c75352014-10-22 17:22:30 -0500[diff] [blame]248 bool "Export OMAP IOMMU internals in DebugFS"
249 depends on OMAP_IOMMU && DEBUG_FS
250 ---help---
251 Select this to see extensive information about
252 the internal state of OMAP IOMMU in debugfs.
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300[diff] [blame]253
Suman Anna61c75352014-10-22 17:22:30 -0500[diff] [blame]254 Say N unless you know you need this.
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300[diff] [blame]255
Daniel Kurtzc68a2922014-11-03 10:53:27 +0800[diff] [blame]256config ROCKCHIP_IOMMU
257 bool "Rockchip IOMMU Support"
Simon Xue4f1fcfe2017-05-03 17:19:40 +0200[diff] [blame]258 depends on ARM || ARM64
Joerg Roedel11175882014-11-03 18:16:56 +0100[diff] [blame]259 depends on ARCH_ROCKCHIP || COMPILE_TEST
Daniel Kurtzc68a2922014-11-03 10:53:27 +0800[diff] [blame]260 select IOMMU_API
261 select ARM_DMA_USE_IOMMU
262 help
263 Support for IOMMUs found on Rockchip rk32xx SOCs.
264 These IOMMUs allow virtualization of the address space used by most
265 cores within the multimedia subsystem.
266 Say Y here if you are using a Rockchip SoC that includes an IOMMU
267 device.
Ohad Ben-Cohenab493a02011-06-02 02:48:05 +0300[diff] [blame]268
Hiroshi DOYUd53e54b2011-11-16 17:36:37 +0200[diff] [blame]269config TEGRA_IOMMU_GART
270 bool "Tegra GART IOMMU Support"
271 depends on ARCH_TEGRA_2x_SOC
272 select IOMMU_API
273 help
274 Enables support for remapping discontiguous physical memory
275 shared with the operating system into contiguous I/O virtual
276 space through the GART (Graphics Address Relocation Table)
277 hardware included on Tegra SoCs.
278
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200[diff] [blame]279config TEGRA_IOMMU_SMMU
Thierry Reding89184652014-04-16 09:24:44 +0200[diff] [blame]280 bool "NVIDIA Tegra SMMU Support"
281 depends on ARCH_TEGRA
282 depends on TEGRA_AHB
283 depends on TEGRA_MC
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200[diff] [blame]284 select IOMMU_API
285 help
Thierry Reding89184652014-04-16 09:24:44 +0200[diff] [blame]286 This driver supports the IOMMU hardware (SMMU) found on NVIDIA Tegra
Thierry Reding588c43a2015-03-23 10:45:12 +0100[diff] [blame]287 SoCs (Tegra30 up to Tegra210).
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200[diff] [blame]288
KyongHo Cho2a965362012-05-12 05:56:09 +0900[diff] [blame]289config EXYNOS_IOMMU
290 bool "Exynos IOMMU Support"
Marek Szyprowski740a01ee2016-02-18 15:12:58 +0100[diff] [blame]291 depends on ARCH_EXYNOS && MMU
Arnd Bergmanndb3a7fd2017-07-28 15:19:19 +0200[diff] [blame]292 depends on !CPU_BIG_ENDIAN # revisit driver if we can enable big-endian ptes
KyongHo Cho2a965362012-05-12 05:56:09 +0900[diff] [blame]293 select IOMMU_API
Tushar Behera4802c1d2014-07-04 15:01:08 +0530[diff] [blame]294 select ARM_DMA_USE_IOMMU
KyongHo Cho2a965362012-05-12 05:56:09 +0900[diff] [blame]295 help
Sachin Kamat5455d702014-05-22 09:50:55 +0530[diff] [blame]296 Support for the IOMMU (System MMU) of Samsung Exynos application
297 processor family. This enables H/W multimedia accelerators to see
298 non-linear physical memory chunks as linear memory in their
299 address space.
KyongHo Cho2a965362012-05-12 05:56:09 +0900[diff] [blame]300
301 If unsure, say N here.
302
303config EXYNOS_IOMMU_DEBUG
304 bool "Debugging log for Exynos IOMMU"
305 depends on EXYNOS_IOMMU
306 help
307 Select this to see the detailed log message that shows what
Sachin Kamat5455d702014-05-22 09:50:55 +0530[diff] [blame]308 happens in the IOMMU driver.
KyongHo Cho2a965362012-05-12 05:56:09 +0900[diff] [blame]309
Sachin Kamat5455d702014-05-22 09:50:55 +0530[diff] [blame]310 Say N unless you need kernel log message for IOMMU debugging.
KyongHo Cho2a965362012-05-12 05:56:09 +0900[diff] [blame]311
Laurent Pinchartd25a2a12014-04-02 12:47:37 +0200[diff] [blame]312config IPMMU_VMSA
313 bool "Renesas VMSA-compatible IPMMU"
Magnus Damm3ae47292017-05-17 19:07:10 +0900[diff] [blame]314 depends on ARM || IOMMU_DMA
Guenter Roecka4aaecc2017-09-10 13:43:37 -0700[diff] [blame]315 depends on ARCH_RENESAS || (COMPILE_TEST && !GENERIC_ATOMIC64)
Laurent Pinchartd25a2a12014-04-02 12:47:37 +0200[diff] [blame]316 select IOMMU_API
Laurent Pinchartf20ed392015-01-20 18:30:04 +0200[diff] [blame]317 select IOMMU_IO_PGTABLE_LPAE
Laurent Pinchartd25a2a12014-04-02 12:47:37 +0200[diff] [blame]318 select ARM_DMA_USE_IOMMU
319 help
Geert Uytterhoeven15021d32018-07-25 15:10:29 +0200[diff] [blame]320 Support for the Renesas VMSA-compatible IPMMU found in the R-Mobile
321 APE6, R-Car Gen2, and R-Car Gen3 SoCs.
Laurent Pinchartd25a2a12014-04-02 12:47:37 +0200[diff] [blame]322
323 If unsure, say N.
324
Alexey Kardashevskiy4e13c1a2013-05-21 13:33:09 +1000[diff] [blame]325config SPAPR_TCE_IOMMU
326 bool "sPAPR TCE IOMMU Support"
Alexey Kardashevskiy5b251992013-05-21 13:33:11 +1000[diff] [blame]327 depends on PPC_POWERNV || PPC_PSERIES
Alexey Kardashevskiy4e13c1a2013-05-21 13:33:09 +1000[diff] [blame]328 select IOMMU_API
329 help
330 Enables bits of IOMMU API required by VFIO. The iommu_ops
331 is not implemented as it is not necessary for VFIO.
332
Will Deacon48ec83b2015-05-27 17:25:59 +0100[diff] [blame]333# ARM IOMMU support
Will Deacon45ae7cf2013-06-24 18:31:25 +0100[diff] [blame]334config ARM_SMMU
335 bool "ARM Ltd. System MMU (SMMU) Support"
Joerg Roedela20cc762015-02-04 16:53:44 +0100[diff] [blame]336 depends on (ARM64 || ARM) && MMU
Will Deacon45ae7cf2013-06-24 18:31:25 +0100[diff] [blame]337 select IOMMU_API
Will Deacon518f7132014-11-14 17:17:54 +0000[diff] [blame]338 select IOMMU_IO_PGTABLE_LPAE
Will Deacon45ae7cf2013-06-24 18:31:25 +0100[diff] [blame]339 select ARM_DMA_USE_IOMMU if ARM
340 help
341 Support for implementations of the ARM System MMU architecture
Will Deacon518f7132014-11-14 17:17:54 +0000[diff] [blame]342 versions 1 and 2.
Will Deacon45ae7cf2013-06-24 18:31:25 +0100[diff] [blame]343
344 Say Y here if your SoC includes an IOMMU device implementing
345 the ARM SMMU architecture.
346
Will Deacon48ec83b2015-05-27 17:25:59 +0100[diff] [blame]347config ARM_SMMU_V3
348 bool "ARM Ltd. System MMU Version 3 (SMMUv3) Support"
Robin Murphy08d4ca22016-09-12 17:13:46 +0100[diff] [blame]349 depends on ARM64
Will Deacon48ec83b2015-05-27 17:25:59 +0100[diff] [blame]350 select IOMMU_API
351 select IOMMU_IO_PGTABLE_LPAE
Marc Zyngier166bdbd2015-10-13 18:32:30 +0100[diff] [blame]352 select GENERIC_MSI_IRQ_DOMAIN
Will Deacon48ec83b2015-05-27 17:25:59 +0100[diff] [blame]353 help
354 Support for implementations of the ARM System MMU architecture
355 version 3 providing translation support to a PCIe root complex.
356
357 Say Y here if your system includes an IOMMU device implementing
358 the ARM SMMUv3 architecture.
359
Gerald Schaefer8128f23c2015-08-27 15:33:03 +0200[diff] [blame]360config S390_IOMMU
361 def_bool y if S390 && PCI
362 depends on S390 && PCI
363 select IOMMU_API
364 help
365 Support for the IOMMU API for s390 PCI devices.
366
Dong Jia Shi63f19342017-03-17 04:17:31 +0100[diff] [blame]367config S390_CCW_IOMMU
368 bool "S390 CCW IOMMU Support"
369 depends on S390 && CCW
370 select IOMMU_API
371 help
372 Enables bits of IOMMU API required by VFIO. The iommu_ops
373 is not implemented as it is not necessary for VFIO.
374
Yong Wu0df4fab2016-02-23 01:20:50 +0800[diff] [blame]375config MTK_IOMMU
376 bool "MTK IOMMU Support"
377 depends on ARM || ARM64
378 depends on ARCH_MEDIATEK || COMPILE_TEST
Arnd Bergmann19288322016-02-29 10:19:06 +0100[diff] [blame]379 select ARM_DMA_USE_IOMMU
Yong Wu0df4fab2016-02-23 01:20:50 +0800[diff] [blame]380 select IOMMU_API
381 select IOMMU_DMA
382 select IOMMU_IO_PGTABLE_ARMV7S
383 select MEMORY
384 select MTK_SMI
385 help
386 Support for the M4U on certain Mediatek SOCs. M4U is MultiMedia
387 Memory Management Unit. This option enables remapping of DMA memory
388 accesses for the multimedia subsystem.
389
390 If unsure, say N here.
391
Honghui Zhangb17336c2016-06-08 17:51:00 +0800[diff] [blame]392config MTK_IOMMU_V1
393 bool "MTK IOMMU Version 1 (M4U gen1) Support"
394 depends on ARM
395 depends on ARCH_MEDIATEK || COMPILE_TEST
396 select ARM_DMA_USE_IOMMU
397 select IOMMU_API
398 select MEMORY
399 select MTK_SMI
Honghui Zhangb17336c2016-06-08 17:51:00 +0800[diff] [blame]400 help
401 Support for the M4U on certain Mediatek SoCs. M4U generation 1 HW is
402 Multimedia Memory Managememt Unit. This option enables remapping of
403 DMA memory accesses for the multimedia subsystem.
404
405 if unsure, say N here.
406
Rob Clark0ae349a2017-08-09 10:43:04 -0400[diff] [blame]407config QCOM_IOMMU
408 # Note: iommu drivers cannot (yet?) be built as modules
409 bool "Qualcomm IOMMU Support"
Guenter Roecka4aaecc2017-09-10 13:43:37 -0700[diff] [blame]410 depends on ARCH_QCOM || (COMPILE_TEST && !GENERIC_ATOMIC64)
Rob Clark0ae349a2017-08-09 10:43:04 -0400[diff] [blame]411 select IOMMU_API
412 select IOMMU_IO_PGTABLE_LPAE
413 select ARM_DMA_USE_IOMMU
414 help
415 Support for IOMMU on certain Qualcomm SoCs.
416
Ohad Ben-Cohenab493a02011-06-02 02:48:05 +0300[diff] [blame]417endif # IOMMU_SUPPORT